1. Field of the Invention
This invention relates to a semiconductor device, and more particularly to the improvement of an inverter circuit serving as a basic circuit of a digital integrated circuit.
2. Description of the Related Art
A semiconductor integrated circuit, particularly, an integrated circuit using a MOS transistor is developed with even higher integration density. With the formation of the integrated circuit with even higher integration density, the MOS transistor used in the integrated circuit is miniaturized into the sub-micron region. The basic circuit of the digital circuit is an inverter circuit. However, when the MOS transistors constituting the inverter circuit are miniaturized, the following problems may occur.
1) When the gate size of the MOS transistor is reduced, a so-called short channel effect causes punch-through between the source and drain thereof. As a result, it becomes difficult to suppress the leak current, thereby increasing the standby current in the inverter circuit.
2) When the intensity of the internal electric field of the MOS transistor becomes high, the threshold voltage and mutual conductance of the transistor may be varied by the hot carrier effect. As a result, deterioration in the transistor characteristic and deterioration in the circuit characteristic (operation speed, operation margin and the like) will occur.
3) When the gate length is reduced by miniaturization, the gate width must be made larger than a certain value in order to ensure a necessary amount of current. Therefore, it is difficult to sufficiently reduce the occupied area of the inverter circuit. For example, in a dynamic RAM (DRAM), the miniaturization technique for memory cells is markedly developed. However, since a necessary amount of current must be ensured in the peripheral circuit, the gate width cannot be reduced in many portions of the peripheral circuit, thereby preventing the whole portion of the DRAM chip from being miniaturized.
As described above, with the conventional MOS integration technique, problems that suppression of the leak current in the inverter circuit is difficult, the reliability is lowered by the hot carrier effect and the occupied area of the circuit cannot be reduced because it is required to ensure a necessary amount of current have occurred.
The related art of this invention is disclosed in Japanese Patent Disclosure Nos. 2-71556 and 2-188966.